Blocked all-pairs shortest paths algorithm on Intel Xeon Phi KNL processor

Título:

Blocked all-pairs shortest paths algorithm on Intel Xeon Phi KNL processor:  a case study

Autor:

Rucci, Enzo

Colaboradores:

; De Giusti, Armando Eduardo; Naiouf, Ricardo Marcelo

Temas:

PROCESADORES GRÁFICOS (GPUs)

En:

Congreso Argentino de Ciencias de la Computación (23ro : 2017 : La Plata, Argentina)

Resumen:

Manycores are consolidating in HPC community as a way of improving performance while keeping power efficiency. Knights Landing is the recently released second generation of Intel Xeon Phi architec- ture.While optimizing applications on CPUs, GPUs and first Xeon Phi’s has been largely studied in the last years, the new features in Knights Landing processors require the revision of programming and optimization techniques for these devices. In this work, we selected the Floyd-Warshall algorithm as a representative case study of graph and memory-bound ap- plications. Starting from the default serial version, we show how data, thread and compiler level optimizations help the parallel implementation to reach 338 GFLOPS.

URL/DOI:

Palabras clave:

Xeon Phi

Medio:

Soporte electrónico

Tipo de documento:

Artículo

Descripción física:

1 archivo (1,4 MB)

Idioma:

Español

Publicación:

, 2017

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